Program Schedule

Tutorial Day 1 (4 Jan 2020)

Room 1 (full day) Room 2 (full day) Room 3 (full day)
Tutorial 1: Open-Source EDA and Machine Learning for IC Design – A Live Update Tutorial 2: Hardware Platforms for Artificial Intelligence Tutorial 3: Advances in Power Management for Secure IoT and Efficient Mobile Applications
Andrew B. Kahng, University of California, San Diego

Abdelrahman Hosny, Brown University

 Yu Wang, Tsinghua University
Manish Pandey, Synopsys
Swagath Venkataramani, IBM		 Shreyas Sen, Purdue University

Qadeer Khan, IIT Madras

Tutorial Day 2 (5 Jan 2020)

Room 1 (full day) Room 2 (full day) Room 3 (full day)
Tutorial 4: Embedded Systems: Invisible Computing Tutorial 5: Secure Circuits and Systems Tutorial 6: Resiliency and Testability: Key Drivers for Self-Driving Vehicles
Luca Carloni, Columbia University
Andreas Gerstlauer, University of Texas at Austin
Tulika Mitra, National University of Singapore
Sri Parameswaran, University of New South Wales		 Makoto Ikeda, University of Tokyo
Makoto Nagata, Kobe University
Shivam Bhasin, Nanyang Technical University
Simha Sethumadhavan, Columbia University		 J. A. Abraham, University of Texas, Austin
Shawn Blanton, Carnegie Mellon University
Abhijit Chatterjee, Georgia Tech University
Nirmal Saxena, NVidia , USA

Main Conference Day 1

From  To Jan 6, 2020
08:00 09:00 Registration
09:00 09:45 Inauguration Ceremony (Venue)
09:45 10:30 Keynote 1 : Keynote Address by Baaziz Achour, SVP of Engineering, Qualcomm Technologies Inc.
10:30 11:15 Keynote 2 : Keynote Address by Nivruti Rai, Country Head, Intel India & Vice President – DPG India.
11:15 11:45 Tea/Coffee Break + posters
Room 1 Room 2 Room 3
11:45 13:15 Codesign for Neural Network Systems Test and Verification: Digital, Beyond Digital Architecture: Accelerators, Resilience, Security
Session Chair: Shirshendu Das (IIT Ropar) Session Chair: Sharad Kumar, NXP Session Chair:  T.V. Kalyan (IIT Ropar)
E2GC: Energy-efficient Group Convolution in Deep Neural Networks.
Firing Line: Aruna Tiwari (IIT Indore)
Authors: Nandan Kumar Jha, Rajat Saini, Subhrajit Nag and Sparsh Mittal (IIT Hyderabad)		 Invited: Harry H. Chen (MediaTek)
Title: The Impending Shift towards System-Oriented test
Firing Line: Adit Singh (Auburn)		 A New Partially-Parallel VLSI-Architecture of Quasi-Cyclic LDPC Decoder for 5G New-Radio.
Firing Line: Pranjali Deshmukh (nVidia)
Authors: Anuj Verma and Rahul Shrestha
Invited: Zhiru Zhang (Cornell University),
Title: Algorithm-Accelerator Co-Design for Neural Network Specialization
Firing Line: Siva Satyendra Sahoo (TU Dresden)		 Covert: A Coverage Reporting Tool for Analog Mixed-Signal Designs
Firing Line: Rubin Parekhji (Texas Instruments)
Authors: Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar S and Lakshmanan Balasubramanian (IIT Kharagpur)		 FPGA-Based Acceleration of LU decomposition for Analog and RF Circuit Simulation
Firing line: Saurabh Bhandari (AMD)
Authors: Yogesh Mahajan, Shashank Obla, Mini Namboothiripad, Mandar J. Datar, Niraj Sharma and Sachin Patkar (IIT Bombay)
A Mathematical Approach towards quantization of floating point weights in Low Power Neural Networks
Firing line: Ujjwal Gupta (Intel)
Authors: Joydeep Kumar Devnath, Neelam Surana and Joycee Mekie
 A Low Overhead Methodology for Validating Memory Consistency Models in Chip Multiprocessors
Firing Line: Daniel Mueller-Gritschneder (TU Munich)
Authors: Binod Kumar, Swapniel Thakur, Kanad Basu, Masahiro Fujita and Virendra Singh (IIT Bombay)		 Invited: Pradip Bose (IBM)
Title: Secure and Resilient Autonomy in AI-Centric Systems
Firing Line: Tanay Karnik (Intel)
13:15 14:30 LUNCH + posters
14:30 16:00 Plenary Session: AI VLSI
Hsien-Hsin Sean Lee (Facebook) Title: Machine Learning for Social Network Platforms;
Nishant Patil (Google): Title: Accelerating Deep Learning with Tensor Processing Units;
Song Yao (Xilinx): Title: AI Chip Commercialization: From Application to Silicon
16:00 16:30 Tea/Coffee Break+ posters
Room 1 Room 2 Room 3
16:30 18:00 Digital Systems Security Computing for EDA and EDA for Computing Precision AMS and Bio Applications
Session Chair: Ujjal Guin, Auburn University Session Chair: Susmita Sur Kolay, Indian Statistical Institute (Kolkata) Session Chair: Session Chair: Marshnil Dave (Lion Semiconductor)
Invited: Chester Rebeiro (IIT Madras),
Title: Towards Secure Microprocessors
Firing Line:Firing Line: Nele Mentens (KU Leuven)		  A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer,
Firing line: Zhiru Zhang, Cornell University
Authors: Frederic Gessler, Philip Brisk and Mirjana Stojilovic (EPFL, Switzerland)		  Enhancing the Phase-Noise-Figure-of-Merit of a Resonator using Frequency Transformations
Firing Line: Subhanshu Gupta (WSU)
Authors: Sreeni Poolakkal and Nagarjuna Nallam (IIT Guwahati)
Analyzing Hardware Security Properties of Processors through Model Checking
Firing line: Pramod Subramanyan (IIT Kanpur)
Authors: Binod Kumar, Akshay Kumar Jaiswal, Vineesh V S and Rushikesh Shinde (IIT Bombay)
 Invited: Ashok Jagannathan (Intel),
Title: EDA Challenges to Support 2.5/3D Die Integration.
Firing line: Yun (Eric) Liang (Peking University) 		  3.75ppm/°C, -91dB PSRR, 27nW, 0.9V PVT Invariant Voltage Reference for Implantable Biomedical Applications
Firing Line: Shouri Chatterjee (IIT Delhi)
Authors: Kelam Mounika, Battu Balaji yadav and Zia Abbas (IIIT Hyderabad)
StateLock: State Transition Based Logic Locking for Sequential Circuits
Firing line: JV Rajendran (Texas A&M university)
Authors: Yasaswy Kasarabada and Ranga Vemuri (University of Cincinnati)
 Leveraging Dynamic Partial Reconfiguration with Scalable ILP Based Task Scheduling
Firing line: Weikang Qian, Shanghai Jiao Tong Univ
Authors: Ashutosh Dhar, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim and Deming Chen (University of Illinois Urbana Champagne)
 Invited: Kaushik Sengupta (Princeton University)
Title: Silicon ICs for Biosensing Platforms: From Millimeter-scale Multiplexed Bio-molecular Sensors with Wireless Interfaces to Cell-based Assays
Firing Line: Shreyas Sen (Purdue)

Main Conference Day 2

From To Jan 7, 2020
08:00 09:00 Registration
09:00 09:45 Keynote 3: Suk Lee, TSMC.    Title: Technology directions for a bright semiconductor future
09:45 10:30 KeyNote 4: Max Shulaker, MIT.    Title: Transforming Ideas to Reality: Emerging Nanotechnologies from the “Lab” to the “Fab”
10:30 11:00 Tea/Coffee Break + posters
Room 1 Room 2 Room 3
11:00 12:30 Biomedical and wearable systems Non-conventional electronics Architectural advances: Processors, GPUs, Minibots
Session Chair: Amir Rahmani  (UC Irvine) Session Chair: Veeresh Deshpande (Helmholtz-Zentrum Berlin) Session Chair: John Jose  (IIT Guwahati)
The Design of Ultra Low Power SAR ADC for Implantable Cardioverter Defibrillator (ICD),
Firing line: Amir Aminifar (EPFL)
Authors: Satyajit Mohapatra and Nihar Mohapatra (IIT Gandhinagar)
 Invited: Aaron Thean (NU Singapore)
Title: New Material – System Co-Design for In-Memory, Neural Nets, and Neuro-Inspired Computing
Firing Line: Venkata Vanukuru (Global Foundries)		 Cacheline Utilization-Aware Link Traffic Compression for Modular GPUs,
Firing Line: T.V. Kalyan  (IIT Ropar)
Authors: Kishore Punniyamurthy, Shomit Das and Andreas Gerstlauer (University of Texas, Austin)
An Accurate, Power and Area Efficient 13.33x Charge Pump with Wide-Range Programmability for Biomedical Sensors
Firing line: Amir Aminifar (EPFL)
Authors: Amit Patil, Sumit Bhat and Abirmoya Santra (Sankalp Semiconductor)
 A Design Optimization for Paper-based Digital Microfluidic Biochips Integrating Fluid-Control Co-Design Issues.
Firing line – Ujwal Radhakrishna (MIT)
Authors: Piyali Datta, Arpan Chakraborty and Rajat Kumar Pal
 Invited: Marina Zapater (EPFL)
Title: “Enhancing the thermal reliability of multi-processor systems-on-chip using approximate computing techniques”,
Firing Line: Anuj Pathania (NUS Singapore)
VLSI based Adaptive Power Management Architecture for ECG Monitoring in WBAN,
Firing Line: Marina Zapater (EPFL)
Authors: Jitumani Sarma and Rakesh Biswas
 Efficient Quantum Circuits for Square-Root and Inverse Square-Root,
Firing line: Gage Hills (MIT)
Authors: Srijit Dutta, Yaswanth Tavva, Debjyoti Bhattacharjee and Anupam Chattopadhyay (NTU Singapore)
 Invited: Anuradha Srinivasan (Intel),
Title: mm-scale SoC powering autonomous swarm of Unmanned Ground Vehicles
Firing line: Amit Sharma (Marvell)
12:30 14:00 LUNCH + posters
14:00 14:45 Keynote 5: Stefan Jockusch, VP of Strategy, Siemens Digital Factory.     Title: Where Today meets Tomorrow – Harnessing the Power of AI
14:45 15:00 Tea/Coffee Break + posters
15:00 16:15 Plenary Session: Fireside chat: VLSI in India.
Moderator: Partha Pratim Chakrabarti (IIT Kharagpur).
Panelists:-  Anna Roy, Niti Aayog, Pradip Dutta, Country Head Synopsys India, Hemanth Darbari, Director General CDAC, V Kamakoti, IIT Madras, Reapan Tikoo, Powai Labs IIT Bombay
16:15 16:30 Tea/Coffee Break + posters
Room 1 Room 2 Room 3
16:30 18:00 Optimized Secure Systems  New Computing Enabled by Non-volatile Memories AMS Modeling and Design
Session Chair: Debdeep Mukhopadhyay, IIT Kharagpur Session Chair: Shahar Kvatinsky, Technion, Israel Session Chair: Shreyas Sen (Purdue)
Invited: Saibal Mukhopadhyay (Georgia Tech),
Title: Exploiting On-Chip Power Management for Side-Channel Security
Firing Line: Anupam Chattopadhyay
(NTU Singapore)		  Power Efficient Sense Amplifier For Emerging Non Volatile Memories
Firing line:Krishna Malladi (Samsung)
Authors: Vivek Tyagi, Vikas Rana, Laura CAPECCHI, Marcella CARISSIMI and Marco Pasotti (ST Microelectronics)		 Non-parametric Statistical Density Function Synthesizer and Monte Carlo Sampler in CMOS
Firing line: Ankesh Jain (IIT-D)
Authors: Ahish Shylendra, Sina Haji Alizad, Priyesh Shukla and Amit Ranjan Trivedi (University of Illinois, Chicago)
On the Effect of Aging on Digital Sensors
Firing line: Anupam Chattopadhyay (NTU Singapore)
Authors: Md Toufiq Hassan Anik, Sylvain Guilley, Jean Luc Danger and Naghmeh Karimi (University of Maryland, Baltimore)		 Invited: Kerem Camsari (Purdue University)
Title: p-Bits for Quantum-inspired Algorithms
Firing Line: Damien Querlioz (Univ. Paris-Sud)		 A Novel Methodology of Mode Transition between PWM and PFM for Inverting Buck-Boost and Boost Converter for AMOLED Display Application
Firing Line: Marshnil Dave (Lion Semiconductor)
Authors: Venkatesh Kadlimatti, Prudhvi Thota and Sumit Bhat (Sankalp Semiconductor)
Intensifying Challenge Obfuscation by Cascading RO-PUFs for Random Number Generation
Firing Line: Nele Mentens (KU Leuven)
Authors: Arjun Chauhan, Vineet Sahula, Atanendu Mandal and Abhigyan Dutta (MNIT)		 Invited Vinayak Naik (Global Foundries),
Title: Manufacturable Embedded-MRAM with Superior Endurance and Magnetic Immunity Performances for Industrial-grade MCU and IOT Applications
Firing line: Manu Awasthi (Ashoka University)		 Invited: Maryam Shojaei (IIT Bombay)
Title: Analog, Mixed-Signal and RF Design for Simply Sensing
Firing line: Preet Yadav (Wipro)
18:00 18:30 Tea/Coffee Break + posters
18:30 20:30 Awards and Cultural Program
20:30 21:00 Banquet Keynote: Jan Rabaey (UC Berkeley and IMEC): Title: Of Brains and Computers 
21:00 22:30 Dinner

Main Conference Day 3

Time/Duration Jan 8, 2020
08:00 09:00 Registration
09:00 09:45 Keynote 6: Yvain Thonnert, CEA LETI.    Title: Towards a Scalable Silicon Quantum Computer 
09:45 10:30 Keynote 7: TBD
10:30 11:00 Tea/Coffee Break + posters
Room 1 Room 2 Room 3 Room 4 
11:00 12:30 Brain-inspired Computing Hardware Design for Resilience Arithmetic Units Revisited Analog Circuits
Session Chair: Akash Kumar (TU Dresden) Session Chair: Keerthi Devarajegowda, Infineon Session Chair: Rekha James (Cochin University) Session Chair: Maryam Shojaei (IIT Bombay)
Kaushik Roy, Invited,
Title: Re-Engineering Computing with Neuro-Inspired Learning: Devices, Circuits, and Systems
Firing line: Yu Wang, Tsinghua U.		 Fault Tolerance through Invariant Checking for the Lanczos Eigensolver

Firing Line: Abhijit Chatterjee (Georgia Tech University)
Authors: Felix Loh, Kewal Saluja and Parameswaran Ramanathan (University of Wisconsin, Madison)

 Alternative Reduced Hardware MASH1-1-1 Digital Delta Sigma Architecture,
Firing line: Atul Kumar (Samsung)
Authors: Prasad Kulkarni
 A 36 dB Gain Range, 0.5 dB Gain Step Variable Gain Amplifier with 10 to 25 MHz Bandwidth Third-Order Filter for Portable Ultrasound Systems
Firing line: Anirduhan Sankaran (IIT Madras)
Authors: Purnendu Bhattaru and Nagendra Krishnapura (IIT Madras)
FPGA based convolution and memory architecture for Convolutional Neural Network
Firing Line: Sai Manoj (George Mason University)
Authors: Shahan K A and Dr. J Sheeba Rani (IIST)
 Invited: Rajagopalan Srinivasan, nVidia,
Title: VLSI Design for Excellence for Autonomous Vehicles
Firing line: Andreas Gerstlauer (UT Austin)		 A Novel Parameterized Fused Division and Square-Root POSIT Arithmetic Architecture,
Firing line: Dileep Kurian (Intel)
Authors: Aneesh Raveendran, Sandra Jean, Mervin J, Vivian D and David Selvakumar (CDAC)
  A Low Noise, Low Power, Wide Range Programmable Output Reference Buffer for Sensor Applications,
Firing line: Nihar Mohapatra (IIT Gandhinagar)
Authors: Prudhvi Thota, Kiran Wadagavi, Rakesh Namani, Abirmoya Santra and Sumit Bhat (Sankalp Semiconductor)
Dissecting Convolutional Neural Networks for Efficient Implementation on Constrained Platforms

Firing line: Priyadarshini Panda (Yale University (Purdue at present))
Authors: Vishalini Laguduva Ramnath, Shakil Mahmud, Sathyanarayanan Aakur, Robert Karam and Srinivas Katkoori (University of South Florida)

 A Multi-Agent Co-operative Model to Facilitate Criticality based Reliability for Mixed Critical Task Execution on FPGA based Cloud Environment
Firing Line: Soumyajit Dey (IIT Karagpur)
Authors: Krishnendu Guha, Debasri Saha and Amlan Chakrabarti (Kolkata University)
 A Novel Low Power Ternary Multiplier Design using CNFETs
Firing line: Tanay Karnik (Intel)
Author: Harita Sirugudi, Sharvani Gadgil and Chetan Vudadha
 Invited: Gaurab Banerjee (IISc Bangalore)
Radars on Chip
Firing Line: Ankesh Jain (IIT-D)
12:30 14:00 LUNCH + posters
14:00 14:45 Keynote 8 : TBD
14:45 15:00 Tea/Coffee Break + posters
15:00 16:15 Panel Discussion on VLSI Startups in India
16:15 16:30 Tea/Coffee Break + posters
Room 1 Room 2 Room 3
16:30 18:00 Approximation Techniques for Efficient Hardware Clock and Memory Circuits Thermal and Energy Management for Multi-core
Session Chair: José Ayala, UCM, Spain Session Chair: Damien Querlioz, (Univ Paris-Sud) Session Chair: Mohamed Sabry, NTU, Singapore
 A Sub-Range Error Characterization based Selection Methodology for Approximate Arithmetic Units
Firing Line: Anuj Pathania (NUS Singapore)
Authors: Hassaan Saadat, Tuo Li, Haris Javaid and Sri Parameswaran (UNSW, Sydney)		 Invited Hormoz Djahanshahi (Microchip)
Title: CMOS Clocking Technology for Wireline, Wireless and SoC Applications
Firing line: Maryam Shojaei (IIT Bombay)		 Thermal Load aware Adaptive Scheduling for Heterogeneous Platforms,
Firing line: Alok Prakash (NTU, Singapore)
Authors: Srijeeta Maity, Anirban Ghose, Soumyajit Dey and Swarnendu Biswas (IIT Kharagpur)
Area and Energy Efficient Approximate Square Rooters for Error Resilient Applications,
Firing line: Anuj Pathania (NUS)
Authors: Neelam Arya, Teena Soni, Manisha Pattanaik and G.K. Sharma (IIITM, Gwalior)
 Design of Sense Amplifier for Wide Voltage Range Operation of Split Supply Memories in 22nm HKMG CMOS Technology,
Firing line: Yue Zhang (Beihang University)
Authors: Vinay Patil, Anuj Grover and Anuj Parashar (IIIT Delhi)
 User-centric Resource Management for Embedded
Multi-core Processors,
Firing line: Alok Prakash (NTU, Singapore)
Authors: Elham Shamsa, Anil Kanduri, Nima Taherinejad, Alma Proebstl, Samarjit Chakraborty, Amir M. Rahmani and Pasi liljeberg (University of Turku)
Invited: Preeti Ranjan Panda (IIT Delhi),
Title: The Cache Bandwidth Partitioning Problem,
Firing line: Shirshendu Das (IIT Ropar)		 Runtime Monitoring of Inter- and Intra-Thread Requirements on Embedded MPSoCs,
Firing line: Mohamed Sabry (NTU, Singapore)
Authors: Marcel Mettler, Daniel Mueller-Gritschneder and Ulf Schlichtmann (Technical University of Munich)
  Wrap Up