• 1
  • 3
  • wowslider
  • 5
  • 6

Hackathon

Welcome to Embedded and VLSI Design Conference 2019 – Cadence® Tensilica® Hackathon!

"Porting deep Neural Network for Cadence® Tensilica® AI Processor"

There are several deep neural networks of different types like CNN (Convolutional Neural Networks) or RNN (Recurrent Neural Networks) which are used in autonomous driving applications.

Cadence Tensilica Vision P6 DSP is a highly efficient neural and vision DSP, which can run implementations of CNN/RNN in an optimal way.

Compiling of a network to Vision P6 core is achieved using XNNC, a compiler tool which takes network description as input and generates implementation for Vision P6 core.

In this Cadence Tensilica Hackathon, we expect participants to take one of the networks from the list below and port using XNNC to achieve clean compilation and high efficiency of results.

  • Classification Networks (e.g., MobileNet)
  • Segmentation Networks (e.g., E-Net, SegNet, Shuffle Net)
  • Object Detection Networks (e.g., Yolo, SSD, Faster and Masked RCNN)
Please note that the above list of networks is indicative and the organizers will provide a specific list two weeks before the Hackathon date.

Winning hacks will be judged based on objective performance numbers which are output by XNNC and also subjective evaluation of approach used by participants

Number of entries are limited to only 15 teams. You can form your own team of up to 3 members.

Awards will be presented at the Awards Ceremony on the evening of January 8, 2019.

Registration
Please send your entries by email with your names, name of institution to vlsid2019_hackathon@googlegroups.com by December 17, 2018.

Along with your entry email, include a short description about yourself and your team.

Schedule
Hackathon prep-up training – January 5 at 9.00AM sharp
Contest time –January 5, 12noon to January 6, 12noon

Venue
IIT Delhi Campus
Hauz Khas, New Delhi

What will be provided?
  • Training on Cadence Tensilica XNNC (Xtensa Neural Network Compiler)
  • Experts from Cadence will be around the entire time to help you during Hackthon
  • All meals and snacks for the duration of the Hackathon
  • One laptop per team
Winners will get exciting cash prizes:
1st place team cash prize of INR 65,000
2nd place team cash prize of INR 35,000

JECC, Jaipur

About VLSID Conference

VLSI Design Conference started as a simple idea in 1985: to sense the level of VLSI activities in India with a focus on engineering education & research. Over the years, the conference has grown equilaterally with a VLSI community that includes the likes of Multinational Industries, Academic contributors and Government bodies around the globe. With its global footprints VLSID is recognized as a 'Sister Conference' of Design Automation Conference. This conference is sponsored by VLSI Society of India (VSI).