VLSID & ES 2018 – Main Conference Technical Program – Concise

Venue Newton Galileo mc2instein Da Vinci Wenge Oak Mahagony
                                  Day 1 – 8th January 2018
Start End Track A Track B Track C Track S(Student) & Industry Forum

User & Designer Track PhD Forum & WIE Track Design Contest
7:30 AM 9:00 AM Registrations
9:00 AM 9:40 AM Ganesh Vandana and Welcome talks
9:45 AM 10:30 AM Keynote by Mark. E. Re, Chief Technology Officer, Seagate
Title: “Security Challenges & Opportunities for Growing Data
10:35 AM 11:20 AM Keynote by Sachidanand Varadarajan, Engineering Vice President, Qualcomm
Title: “Smart and Secure Systems in a Connected World
11:25 AM 11:40 AM Inauguration of Exhibits
11:40 AM 11:55 AM Break Out
11:55 AM 1:15 PM Track 1A: Analog/RF – I Track 1B: Power Management Track 1C: FPGA – I Track 1S Track 1U: High Performance Design Track 1P Design Contest
1:15 PM 2:15 PM Lunch
2:15 PM 2:55 PM Keynote by Joerg Henkel, Karlsruhe Institute of Technology (KIT), Germany
Title: “Power Density and Reliability in Embedded On-Chip Systems
3:05 PM 4:05 PM Panel Discussions: “Automotive Hardware and Software Innovations — Leveraging Make in India for Global Markets”
Moderator: Ashok Chandak (NXP)
Panelists: Niranjan Pol (Seagate), Randeep Singh (Tata Motors), Anup Sable (KPIT)
4:05 PM 4:25 PM Networking Break and High Tea
4:25 PM 5:45 PM Track 2A: Security – I Track 2B: Test Track 2C: Devices and Emerging Technologies Track 1F Track 2U: Embedded – I Track 2P Design Contest
Venue Newton Galileo mc2instein Da Vinci Wenge Oak Mahagony
                               Day 2 – 9th January 2018
7:30 AM 8:00 AM Registrations
8:00 AM 8:30 AM Two Start-Up Presentations – “Tarana Wireless” & “SenZopt Technologies”
8:30 AM 9:15 AM Keynote by Tim Donovan, Vice President, Connectivity Group, Marvell
Title: “Increasing Demands to Move, Store and Process the World’s Data
9:15 AM 10:00 AM Keynote by John F Reid, Director, Product Technology and Innovation, John Deere
Title: “Robotics and Automation Technology to Drive Future Agricultural Systems Productivity
10:00 AM 10:20 AM Break Out
10:20 AM 11:40 AM Track 3A: Security – II Track 3B: Oscillators Track 3C: FPGA – II Proposed Sponsored Tutorial Track 3U: Design Automation and Verification Track 3P Design Contest
11:40 AM 11:50 AM

Break out
11:50 AM 1:10 PM Track 4A: Analog/RF – II Track 4B: Special Session Track 4C: Special Session Track 2F Track 4U: Embedded – II (Special Session) Track 1W Design Contest
1:10 PM

2:10 PM Lunch
2:10 PM 2:55 PM Keynote by Krishnendu Chakrabarty
Title: “Digital Microfluidic Biochips: From Manipulating Droplets to Quantitative Gene-Expression Analysis
3:00 PM 3:45 PM Panel Discussion: “Trusting the Data and the Things
Moderator: Monty Forehand (Seagate),
Panelists: Rohas Nagpal (PrimeChain), Puneet Singh (Qualcomm), Shailendra Fuloria (Eaton), Sudin Baraokar(SBI)
3:50 PM 4:35 PM Panel Discussion: “Trends and Challenges in Semiconductor Industry
Panelists: Bishnupriya Bhattacharya (Cadence), Chitra Hariharan (SenZopt Technologies), Vijaylaxmi Khanolkar (Texas Instruments), Anusua Bhowmik (Advanced Micro Devices), Susmita Sur-Kolay (Indian Statistical Institute)
4:35 PM 4:55 PM High Tea
4:55 PM 6:15 PM Track 5A: Reliability and SRAMs Track 5B: VLSI Architecture Track 5C: Design Automation Track 2S Track 5U: Security – III Track 2W Design Contest
6:15 PM 6:45 PM Networking Break
6:45 PM 8:05 PM Award Function & Cultural Program
8:05 PM 9:05 PM Banquet Dinner
Venue Newton Galileo mc2instein Da Vinci Wenge Oak Mahagony
                                   Day 3 – 10th January 2018
7:30 AM 8:00 AM Registrations
8:00 AM 8:30 AM Two Start-Up Presentations
8:30 AM 9:15 AM Keynote by Pradeep Dubey, Intel Fellow
Title: “Artificial Intelligence and The Virtuous Cycle of Compute
9:20 AM 10:05 AM Keynote by Ruchir Dixit, Mentor Graphics India
Title: “Safety begins with Trust”
10:05 AM 10:25 AM Break Out
10:25 AM 11:45 AM Track 6A: Analog/RF – III Track 6B: Regulators Track 6C: Embedded – III Track 3S Track 6U: Fault Tolerance Track 4P Design Contest
11:45 AM 12:45 PM Lunch
12:45 PM 1:30 PM Keynote by Louis Scheffer
Title: “Brain Research, the Internet of Things, and New Engineering Ethics
1:35 PM 2:20 PM Panel Discussion: “The law of Start-Up Landscape”,
Moderator: Anil Paranjape (Wharton School),
Panelists: Som Shubro Pal (Bharat Fund), Jitendra Chaddah(Intel), Nicco Bhabu (EV Motors)
2:25 PM 2:45 PM High Tea
2:45 PM 4:05 PM Track 7A: Security – III Track 7B: Verification and Validation Track 7C: Memory Track 4S Track 7U: Embedded – IV Design Contest
4:05 PM 4:35 PM Tea and Certificate Distribution
Venue Newton Galileo mc2instein Da Vinci Wenge Oak Mahagony
                                   Day 4 – 11th January 2018
9:30 AM 5:00 PM RASDAT Workshop
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