29th International Conference
on VLSI Design
15th International Conference
on Embedded Systems
January 4-8, 2016
Theme: Technologies for a Safe and Inclusive World

Submission Deadlines Extended Till 15 October, 2015

Call for User / Designer Track    Important Dates Submission

In the User/Designer Track, hardware designers and software developers from leading IC companies and academic institutions are invited to present their design experiences and share benefits and challenges of different design methodologies, tools, design flows and best practices. It provides excellent opportunity for education and networking between end users and tool developers.

User/Designer Track complements the Regular Track where the focus is more on research papers compared to practical implementation in this track. The subject may target system-level design, micro-architecture issues, circuit design, verification, CAD flows, timing closure, DFT and physical design. A submission may be problem-specific in scope (e.g., hardware/software-based architecture exploration) or may address a specific application domain (e.g., designing connected devices). In keeping with the theme of the conference, papers related to implementation of technologies related to a safe and inclusive world will be the focus.

The User/Designer Track includes four broad topic areas: Front-end Silicon Design, Back-end Silicon Design, Analog and Mixed Signal Design and Embedded Systems and Software. The track will have oral presentations and poster sessions. The accepted proposals only need a presentation or a poster at the conference, and do not require a completed paper as it does not appear in the conference proceedings.

User / Designer Track proposal submission guidelines :

Proposal should be Word document or a PDF less than two A4 pages with a word limit of 1000 words and should contain the following:

  • A Title
  • Name, affiliation, phone number and email addresses of all the authors
  • A short biographical sketch and expertise for all authors
  • Category
  • An introduction on the practical aspect of the contribution
  • A summary highlighting the specific contribution (practical aspects & techniques that work and don't work).
  • Results/Impact
  • References, if appropriate

Important Dates

  • Extended Abstract Submissions: September 15 October 15, 2015
  • Notification of Acceptance: November 10 November 25, 2015
  • Poster/Presentation submission: December 1, 2015
  • Submission Site: "https://www.softconf.com/e/vlsi2016_user"

Conference Presentation Details :

  • If accepted for Oral presentation final submission should be in PowerPoint format
  • Presentation Time: 15 mins including Q&A
  • If accepted by Poster presentation details will be intimated later.


  • RTL Design & Synthesis, Low Power Design & Verification, Power/ Area/ Performance Trade-offs
  • Architectural exploration & optimization (ESL or TLM)
  • Embedded Hardware-Software Co-Design
  • Design and Verification of IPs
  • Various aspects of Verification (Security, Formal, Assertion, Coverage, HVL Testbenches) & its automation
  • Design & Verification Methodologies and Tool Flows
  • Design for Test (DFT)
  • FPGA & Emulation


  • Floor Planning and Physical Synthesis
  • Placement and Routing
  • Physical Design Closure
  • Timing Analysis and Optimization, Signal Integrity
  • Reliability, Design For Manufacturing (DFM), DFY
  • Power estimation, Power Analysis and Power integrity
  • Co-design - Chip/package/board
  • Silicon Debug and Manufacturing Test
  • Package Design, Multi-chip Modules
  • Tool control and integration


  • Analog/Mixed Signal Design, and inter-operability
  • RF Design
  • Circuit Design and in design verification
  • Extraction & Simulation
  • Design Optimization for Power/Area/Performance
  • Automation & Methodology development in Analog/Mixed Signal Designs


  • Hardware Design
  • Embedded Software Design
  • Power aware signal integrity analysis
  • Protocols
  • Security for embedded systems and software
  • Hardware/Software co-design and Testing
  • Reliability &Compliance
Sponsors Technical Co-sponsors