VLSI Design
VLSI Design



Keynote 1

“Intelligent Silicon in the Data-centric Era”

Abhi Talwalkar
Abhi Talwalkar

President & CEO
LSI Corp.

Abstract :- As the world becomes increasingly mobile and social, a global data deluge is creating challenges on many fronts, including a need to manage the environmental impact of sharing and storing the massive amount of data created. Companies are increasingly looking at new solutions to manage cost, power, and performance.  Innovation and collaboration across datacenters, mobile networks and client devices is growing in importance as IT’s focus shifts away from processing and computing to a wider look at how data is created and managed throughout datacenters and mobile networks. In his keynote, LSI’s President and CEO Abhi Talwalkar will discuss his perspective on the challenges of  a new “data-centric” era and the role played by intelligent silicon in addressing these challenges.


Speaker Biography :- Abhi Talwalkar is president and chief executive officer of LSI, a position he has held since he joined LSI in May 2005. Since joining, Abhi has led a top-to-bottom transformation of LSI, repositioning the company to focus on semiconductors that accelerate storage and networking in datacenters, mobile networks, and client computing.


Abhi joined LSI from Intel Corporation, where he served as vice president and co-general manager of the Digital Enterprise Group, which is comprised of Intel's business client, server, storage, and communications businesses. He also previously served as vice president and general manager for the Intel Enterprise Platform Group. Prior to joining Intel, Abhi held senior engineering and marketing management positions at Sequent Computer Systems, Bipolar Integrated Technology Inc., and Lattice Semiconductor Inc.


Abhi earned a bachelor's degree in electrical engineering from Oregon State University.

Keynote 2

"Opportunities and Challenges for High Performance Microprocessor Designs and Design Automation."

Ruchir Puri
Dr. Ruchir Puri

IBM Fellow
Thomas J Watson Research Center

Abstract :- With end of an era of classical technology scaling and exponential frequency increases, high end microprocessor designs and design automation methodologies are at an inflection point. With power and current demands reaching breaking points, and significant challenges in application software stack, we are also reaching diminishing returns from simply adding more cores. In design methodologies for high end microprocessors, although chip physical design efficiency has seen tremendous improvements, strong indications are emerging for maturing of those gains as well. In order to continue the cost-performance scaling in systems in light of these maturing trends, we must innovate up the design stack, moving focus from technology and physical design implementation to new IP and methodologies at Logic, architecture, and at the boundary of hardware and software, solving key bottlenecks through application acceleration. This new era of innovation, which moves the focus up the design stack presents new challenges and opportunities to the design and design automation communities. This talk will motivate these trends and focus on challenges for high performance microprocessor design and design automation in the years to come.

Speaker Biography :- Ruchir Puri is an IBM Fellow at Thomas J Watson Research Center, Yorktown Hts, NY where his efforts have focused on high performance design and methodology solutions for all of IBM's enterprise server and system chip designs. Most recently, he lead the design methodology innovations for IBM's latest Power7 and zEnterprise microprocessors and is currently leading design methodology research efforts on future processors. Ruchir has received numerous IBM awards including the highest technical honor – IBM Fellow, which was awarded for his transformational role in microprocessor design methodology. In addition, he has received “Best of IBM” awards in both 2011 and 2012 and IBM Corporate Award from IBM's CEO, and several IBM Outstanding Technical Achievement awards.


Dr. Puri is a Fellow of the IEEE, a member of IBM Academy of Technology and IBM Master Inventor, an ACM Distinguished Speaker and IEEE Distinguished Lecturer. He is recipient of SRC outstanding mentor award and has been an adjunct professor at Dept. of Electrical Engineering, Columbia University, NY and was also honored with John Von-Neumann Chair at Institute of Discrete Mathematics at Bonn University, Germany.



Keynote 3 ( Addressing to the conference )

"Cloud computing needs at less power and low cost"

Paramesh Gopi

Dr. Paramesh Gopi

President & CEO
Applied Micro ( APM )

Speaker Biography :- Paramesh Gopi is President & Chief Executive Officer of Applied Micro Circuits Corp, a role he has commanded since May 2009 after joining the company in 2008. Under Dr. Gopi’s leadership, AppliedMicro is transforming into a mid-cap semiconductor company.  In fact, no other small cap semiconductor company is developing and introducing as many groundbreaking new products as AppliedMicro.
Under his leadership, AppliedMicro has set a course for exponential growth by re-aligning its semiconductor product portfolio to converge on the cloud computing data center, one of the most vibrant technology opportunities to emerge over the last decade. Dr. Gopi’s vision has guided AppliedMicro to develop the revolutionary 64-bit ARM processor-based server-on-a-chip to disrupt the status quo in the cloud services data center market. The X-Gene platform combines high performance computing and low power consumption in just the right quantities to bring game-changing reductions in total cost of ownership as demand for data center services continues to grow at an explosive pace.
Leveraging AppliedMicro’s core competencies and resources, Dr. Gopi reinvigorated the company’s existing business lines and drove an order-of-magnitude increase in new product introductions over the last fiscal year, a cadence that will generate upwards of $200 million in new revenue over the next 30 months.
Dr. Gopi’s passion for capitalizing on emerging market opportunities  was established before joining AppliedMicro as he contributed to the development of Apple’s iPhone, Sony’s Playstation and the wireless ecosystem. Before joining the company, he served in executive management positions at both Marvell and Mindspeed Technologies/Conexant Systems.

Dr. Gopi holds a doctorate in electrical and computer engineering at the University of California, Irvine. Gopi is the recipient of the 2011 Lauds & Laurels Distinguished Alumnus Award from The Henry Samueli School of Engineering at UC, Irvine.


Keynote 3

"Challenges in First Pass Silicon Success in SoC Designs"

Amal Bommireddy

VP, Engineering
Applied Micro ( APM )

Abstract :- Over the last few years, the trend in silicon implementation is to move away from inflexible Application Specific Integrated Circuits (ASICs) towards System on Chip (SoC) platforms.These SoC platforms allow flexible  programming ability to do the same task as ASICs in multiple application domains, thereby increasing the total addressable market with the same platform. Another trend that IC designers must deal with is the shortening of market windows at the system level. Not only is the product ramp quite steep - especially for consumer products - but the profit window is also smaller. Given these trends, it is important that SoC designs must see first pass silicon success, so that the market window can be met. This is not, however, an easy task. SoC designs can be very complex, and require well thought-out strategies and flows in diverse areas such as RTL design, verification, backend, test, system design and validation. This talk discusses various such strategies which go a long way towards guaranteeing first pass success.

Speaker Biography :- Amal Bommireddy joined AppliedMicro in November 2009 as Vice President of Engineering, bringing with him more than 23 years of engineering and technical management experience. Before joining AppliedMicro, Mr. Bommireddy was Director of Engineering at Qualcomm, where he was responsible for design of baseband SOCs. Prior to that, he was Vice President, Engineering at Ample Communications, a fabless semiconductor startup. Bommireddy previously served as Director of the Switching Group at Intel Corp, and before that, as a Fellow at Acuson, a maker of ultrasound machines.

Mr. Bommireddy has a bachelor’s degree in engineering from Osmania University, India and a master’s degree in electrical engineering from Southern Illinois University.




Keynote 4

"Semiconductors in Smart Energy Products"

Kishore Manghnani

Kishore Manghnani

Vice President of Communications and Consumer Business

Abstract :- This talk will cover an overview of various segments of green technology industry ranging from renewable energy generation to energy efficiency technologies and products and why energy efficiency products like LED Lighting are gaining rapid adoption by the industry and consumers around the world. We will go over details of  semiconductors and embedded software, which play a key role in successful deployment of demand reduction products like smart energy devices & LED lighting. 

Speaker Biography :- Mr. Kishore Manghnani, vice president of Green Technology Products Group, heads up Marvell’s green technology products and strategic partnerships. In addition, Mr. Manghnani has been leading Marvell’s initiative in next-generation connected ePaper devices. He joined Marvell in 2004 to spearhead and accelerate the wireless home networking and application processor business units. Prior to joining Marvell, Mr. Manghnani served as vice president and general manager of cable broadband products at Terayon, vice president of Marketing of HDTV products at TeraLogic, and director of Marketing for consumer products at LSI Logic.


Mr. Manghnani received his MSEE in electrical engineering from the University of Hawaii and a Master of Business Administration from Santa Clara University.



Keynote 5

"Deciphering the brain, cousin to the chip"

Lou Scheffer
Lou Scheffer

JFRC Fellow
Howard Hughes Medical Institute

Abstract :- At a very fundamental level, VLSI chips and animal nervous systems are closely related.  They both process information via a large and complex network of relatively simple components.  We understand exactly how chips work, and how they are built, because we design them ourselves.  Nervous systems, on the other hand, are poorly understood, both in overall design and details of implementation.  Biological technology has now advanced to the point where we can begin to investigate these issues, using  methods conceptually similar to those used to analyze and reverse engineer chips.  This talk will introduce discuss the methods that are now being used and prospects for further understanding. The current state of the art in this endeavor  might be compared to that of VLSI design at the time when only individual circuits could be implemented. As with VLSI, a similar long and intensive effort lies ahead until the full potential of this technology is known.  The fruit of this understanding will be huge, however - the talk will close with some potential benefits, both intellectual and commercial, that such an understanding will provide.

Speaker Biography :- Lou Scheffer is a fellow at the Janelia Farm Research Campus of the Howard Hughes Medical Institute.  His research focuses on deducing the
the structure and operation of the nervous system by reverse engineering existing biological systems.  His group uses electron microscopy and custom-built software to reconstruct the details of neural operation, starting with the optical lobes of the fruit fly.  Before switching to biology, Lou spent about 30 years in EDA, mostly with Cadence Design Systems, and before that was a chip designer.  His main outside interest is in SETI, the search for extraterrestrial intelligence.


He graduated from Caltech and Stanford, and is the author of the usual books, papers, and patents.





Keynote 6

"Duniyaa Maange Moore!"

Vivek Singh
Vivek K. Singh

Intel Fellow, Technology and Manufacturing Group

Director, Computational Lithography

Speaker Biography :- Vivek Singh is an Intel Fellow and director of computational lithography in Intel's Technology and Manufacturing Group.


He is responsible for all of Intel's CAD and modeling tool development in full chip OPC, lithography verification, rigorous lithography modeling, next-generation lithography selection, inverse lithography technologies, double patterning, and design rule creation. He also represents Intel on several external Design for Manufacturability (DFM) forums, including the SPIE DFM Conference, and serves on the Board of the Lithography Workshop.

Singh joined Intel in 1993 as a modeling applications engineer, was appointed team leader for the Resist and Applications Group in 1996, and was appointed overall leader of the Lithography Modeling Group in 2000.

He holds 20 patents and has published over 50 technical papers. He and his teams have won three Intel Achievement Awards, two Technology Excellence Awards, and one Intel Software Quality Award.

Singh graduated from the Indian Institute of Technology in Delhi with a bachelor's degree in chemical engineering in 1989. He earned a master's degree in chemical engineering in 1990, a Ph.D. minor in electrical engineering in 1993, and a Ph.D. in chemical engineering in 1993, all from Stanford University.

Keynote 7

"Embedded Vision Systems"

Vijaykrishnan Narayanan
Vijaykrishnan Narayanan

Penn State

Abstract :- While machine vision research has continued to improve multi-fold over the past few decades, it still significantly falls short of the abilities and efficiencies of the primate visual cortex system. The primate brain is especially superior as pertains to comprehending and interacting with complex natural environments.  In energy-efficiencies, the brain is estimated to be five to six orders better than current machine vision solutions. While there is much consensus on the superiority of biological vision systems over machine systems on most vision tasks, the approaches leading to the better efficiencies and flexibility akin to the visual cortex are still widely debated. In this talk, I will highlight recent efforts at architecting customized digital hardware systems using neuromorphic algorithms as one successful approach to achieving better energy efficiencies. I will also outline emerging embedded visions applications.

Speaker Biography :- Vijaykrishnan Narayanan is a Professor of Computer Science and Engineering and Electrical Engineering at The Pennsylvania State University. His research and teaching interests include embedded systems, computer architecture, system design using emerging device technologies and power-aware computing. He has deep interests in cross-disciplinary advances and has led and participated in such projects. He is the deputy editor-in-chief of IEEE TCAD and served as the editor-in-chief for ACM Journal of Emerging Technologies in Computing Systems. He has won several awards including the 2012 ASPDAC Ten-year retrospective Most influential paper, 2012 Penn State Alumni Society Premier Research Award and 2010 Outstanding Alumnus Award from SVCE, India. He is a fellow of IEEE. He has worked with several outstanding students who are currently in industry and academia throughout the world.

Keynote 8

"Electronics Backbone of Renewable Energy Industry"

Venkat Rajaraman
Venkat Rajaraman


Abstract :- Renewable Energy sources have been regarded as the most promising means to solve the energy and environmental issues that we face nowadays. Electronics has become a key enabling technology for energy savings and renewable energy.  Renewable Electronics has started to play a more and more important role in diverse range of applications in renewable energy. These new applications bring new dimensions of challenge to power electronics with demanding capabilities and higher reliability and availability in harsh environment.

In this talk, an overview of enabling technologies in control and power electronics to facilitate power generation through renewable energy will be presented.  These include an overview of RE electronic systems, inverter technologies, performance improvement from distributed electronics, monitoring and control systems, balance of system considerations and conclude by linking challenges to necessary changes to product and technologies.

Speaker Biography :- Venkat is currently the CEO of Solaris. He has over 20 years of experience in System design and Engineering Management. Prior to joining Solaris, he was the CEO of Su-Kam Power Systems, a leading power back-up and renewable energy solution provider from India. Earlier to moving to renewable energy space, he was the Vice President of Engineering at Portal Player, a company that was acquired by NVIDIA Corp in Jan 2007. He worked at Sun Microsystems, USA.


He has BE degree from Madurai-Kamaraj University and a Master's degree in Electrical Engineering from Stanford University.



Keynote 9

"Advancing High Performance System-on-Package via Heterogeneous 3-D Integration"

Ken Chang
Ken Chang

Senior Director
Xilinx Transceiver Group

Abstract :- With the emergence of More-than-Moore era, 3D integration has become the critical technology ingredient to expand beyond traditional scaling.  It creates another dimension of system-level optimization for highly integrated packaged chips.  In the traditional technology world, due to physical and economic issues, the vast majority of high performance analog chips, high density memory chips, and high performance digital chips are each built on separate technologies. Therefore, in order to deliver optimum system performance, power and cost, it is desirable to integrate multiple different die, each using its own optimized technology, in a single package. Heterogeneous 3D die stacking enables the integration of chips of different technologies into the same package.  This talk presents the industry’s first heterogeneous Stacked Silicon Interconnect (SSI) FPGA family (3D integration). Mounted on a passive silicon interposer with through-silicon vias (TSVs), the heterogeneous IC stack comprises FPGA ICs with 13.1-Gb/s transceivers and dedicated analog ICs with 28-Gb/s transceivers. The interposer technology allows up to 10,000 inter-chip connections with signaling power levels approaching intra-die connections. This talk discusses the underlying technology and challenges encountered in implementing a heterogeneous FPGA and SerDes which delivers a previously unattainable off chip bandwidth of 2.78Tb/s, approximately three times that achievable in a monolithic solution. The results indicate heterogeneous 3D integration is a reliable method to build very high-bandwidth multi-chip devices that exceed current monolithic capabilities from traditional technology scaling.

Speaker Biography :- Mr. Ken Chang is the senior director of Xilinx transceiver group.  He leads the development of multi-standard transceiver IP for Xilinx FPGA.   He has authored and coauthored over 20 IEEE publications and hold 20+ US patents in the high-speed link area.  He was a co-recipient of the 2008 Best Regular Paper Award of the IEEE Custom Integrated Circuits Conference (CICC), and is currently on the technical program committees for International Solid States Circuit Conference and VLSI Circuits Symposium.  Mr. Chang received the B.S. degree in electrical engineering from National Taiwan University, Taipei, and the M.S. and Ph.D. degrees in electrical engineering from Stanford University.



Industry Forum Keynote

"Green Electronics & Sustainability – Key Business Imperatives for the 21st Century"

TR T. R. Ramachandran

VP - Corporate Quality and Programs

Abstract :- The key to green electronics is creating products that can be designed, manufactured and utilized in a sustainable manner without causing significant negative environmental, social and economic consequences. Over the last decade and more, leading companies across the world have started to embrace sustainability as a key operating goal, recognizing that such practices also provide them long term financial benefits. The topic of sustainability will be introduced through the lens of major global driving forces such as pollution/contamination, restricted substances, greenhouse gas emissions/climate change, energy consumption/efficiency, waste/recycling, conflict minerals, and supply chain transparency. Numerous industry, governmental, and non-governmental bodies have developed guidelines and requirements to drive sustainable practices throughout the global supply chain of the electronics industry. An overview of these requirements will be provided along with a snapshot of how leading electronics and tech companies are adapting to them and driving sustainability into their product development process and manufacturing operations. Finally, the potential savings and benefits of sustainability practices will be discussed, along with implementation challenges & recommendations.

Speaker Biography :- T. R. Ramachandran is the Vice President for Corporate Quality and Programs at LSI. In this role, he reports to the Chief Operating Officer (COO) of LSI and is responsible for product quality, reliability and program management. Before assuming this role, TR held a number of positions in LSI where he brought to bear a unique blend of expertise in a range of areas from business, operations & program management, strategic/competitive analysis, large-scale M&A and business transformations, global product development and deployment, and supplier & manufacturing management. He lives in the United States in Northern California, and is keenly interested in various aspects of technology & broader public policy as well as problems of scale tied to private, public and/or non-governmental sectors.


TR received a Bachelor’s degree in Metallurgical Engineering from IIT-M (Indian Institute of Technology in Madras/Chennai) and his Masters and Ph.D. degrees in Materials Science from the University of Southern California, Los Angeles. His Ph.D. was focused on structural and optical studies of semiconductor thin films & quantum dot nanostructures and innovative forays into nanotechnology using scanning probe microscopes.


Download the presentation